发明公开
EP0773582A2 Method of forming a trench isolation structure in an integrated circuit
失效
一种用于在集成电路中制备用于隔离一个严重的结构的方法
- 专利标题: Method of forming a trench isolation structure in an integrated circuit
- 专利标题(中): 一种用于在集成电路中制备用于隔离一个严重的结构的方法
-
申请号: EP96118203.7申请日: 1996-11-13
-
公开(公告)号: EP0773582A2公开(公告)日: 1997-05-14
- 发明人: Chen, Ih-Chin
- 申请人: TEXAS INSTRUMENTS INCORPORATED
- 申请人地址: 13500 North Central Expressway Dallas Texas 75265 US
- 专利权人: TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人: TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人地址: 13500 North Central Expressway Dallas Texas 75265 US
- 代理机构: Schwepfinger, Karl-Heinz, Dipl.-Ing.
- 优先权: US6616 19951113
- 主分类号: H01L21/762
- IPC分类号: H01L21/762 ; H01L21/308
摘要:
A method of making a semiconductor device or integrated circuit produces trench isolation structures having rounded corners in order to reduce gate oxide weakness and to avoid the so-called "double hump" curve produced by the corner effect. A LOCOS oxide is removed from the surface of a silicon substrate to produce a depression in the surface. A silicon dioxide or silicon nitride layer is deposited over the surface including the silicon nitride used in the LOCOS process. The surface in anisotropically etched to form sidewall spacers either side of the area where the trench is to be formed. The substrate is then etched to form a trench. In an alternative method, nitride sidewalls are formed prior to removing the LOCOS oxide. The resulting structure is anisotropically etched to leave sidewalls on either side of the trench location, the sidewalls being made of the silicon nitride sidewall and the remainder of the LOCOS oxide. The substrate would then be etched to form the trench.
公开/授权文献
信息查询
IPC分类: