发明公开
EP1037284A3 Heterojunction bipolar transistor and method for fabricating the same
审中-公开
异质结双极型晶体管及其制造方法
- 专利标题: Heterojunction bipolar transistor and method for fabricating the same
- 专利标题(中): 异质结双极型晶体管及其制造方法
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申请号: EP00105401.4申请日: 2000-03-14
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公开(公告)号: EP1037284A3公开(公告)日: 2002-10-30
- 发明人: Asai, Akira , Oonishi,Teruhito , Takagi, Takeshi , Saitoh, Tohru , Hara, Yoshihiro , Yuki, Koichiro , Nozawa, Katsuya , Kanzawa, Yoshihiko , Katayama, Koji , Ichikawa, Yo
- 申请人: Matsushita Electric Industrial Co., Ltd.
- 申请人地址: 1006, Oaza-Kadoma Kadoma-shi, Osaka 571-8501 JP
- 专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人地址: 1006, Oaza-Kadoma Kadoma-shi, Osaka 571-8501 JP
- 代理机构: Grünecker, Kinkeldey, Stockmair & Schwanhäusser Anwaltssozietät
- 优先权: JP6814799 19990315
- 主分类号: H01L29/737
- IPC分类号: H01L29/737 ; H01L21/331 ; H01L27/06 ; H01L21/8249
摘要:
In the method for fabricating a semiconductor device of the present invention, a collector layer (102) of a first conductivity type is formed in a region of a semiconductor substrate (100) sandwiched by device isolation. A collector opening (110) is formed through a first insulating layer (108) deposited on the semiconductor substrate (100) so that the range of the collector opening (110) covers the collector layer (102) and part of the device isolation. A semiconductor layer of a second conductivity type (111) as an external base is formed on a portion of the semiconductor substrate located inside the collector opening (110), while junction leak prevention layers of the same conductivity type as the external base are formed in the semiconductor substrate. Thus, the active region is narrower than the collector opening reducing the transistor area, while minimizing junction leak.
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