发明公开
EP1141838A1 CONSERVATION OF SYSTEM MEMORY BANDWIDTH AND CACHE COHERENCY MAINTENANCE USING MEMORY CANCEL MESSAGES 审中-公开
保存系统的内存带宽和保持高速缓存一致性SPEICHERANNULIERUNGSNACHRICHTEN

  • 专利标题: CONSERVATION OF SYSTEM MEMORY BANDWIDTH AND CACHE COHERENCY MAINTENANCE USING MEMORY CANCEL MESSAGES
  • 专利标题(中): 保存系统的内存带宽和保持高速缓存一致性SPEICHERANNULIERUNGSNACHRICHTEN
  • 申请号: EP99944008.4
    申请日: 1999-08-26
  • 公开(公告)号: EP1141838A1
    公开(公告)日: 2001-10-10
  • 发明人: KELLER, James, B.
  • 申请人: ADVANCED MICRO DEVICES INC.
  • 申请人地址: One AMD Place,Mail Stop 68 Sunnyvale,California 94088-3453 US
  • 专利权人: ADVANCED MICRO DEVICES INC.
  • 当前专利权人: ADVANCED MICRO DEVICES INC.
  • 当前专利权人地址: One AMD Place,Mail Stop 68 Sunnyvale,California 94088-3453 US
  • 代理机构: Sanders, Peter Colin Christopher (GB)
  • 优先权: US217699 19981221; US217212 19981221; US217649 19981221; US370970 19990810
  • 国际公布: WO0038070 20000629
  • 主分类号: G06F12/08
  • IPC分类号: G06F12/08
CONSERVATION OF SYSTEM MEMORY BANDWIDTH AND CACHE COHERENCY MAINTENANCE USING MEMORY CANCEL MESSAGES
摘要:
A messaging scheme that conserves system memory bandwidth and maintains cache coherency during a victim block write operation in a multiprocessing computer system (10) is described. A target node (72) receives a memory cancel response corresponding to a transaction, and aborts processing of the transaction in response to the memory cancel response. In one embodiment, the transaction is a victim block write and the memory cancel response is received from a source node (70). In another embodiment, the transaction is a read operation and the memory cancel response is received from a different node (76) having a modified copy of the data addressed by the read operation.
信息查询
0/0