发明公开
EP1916534A1 Verification and generation of timing exceptions
有权
Überprüfungund Erzeugung von Zeitfehlern
- 专利标题： Verification and generation of timing exceptions
- 专利标题（中）： Überprüfungund Erzeugung von Zeitfehlern
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申请号： EP06022162.9申请日： 2006-10-23
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公开(公告)号： EP1916534A1公开(公告)日： 2008-04-30
- 发明人: Müller-Brahms, Martin Dr. rer.
- 申请人： Onespin Solutions GmbH
- 申请人地址： "Theresie" Haus A Theresienhöhe 12 80339 München DE
- 专利权人： Onespin Solutions GmbH
- 当前专利权人： Onespin Solutions GmbH
- 当前专利权人地址： "Theresie" Haus A Theresienhöhe 12 80339 München DE
- 代理机构： Harrison, Robert John
- 主分类号： G01R31/3181
- IPC分类号： G01R31/3181 ; G06F17/50
摘要：
The invention relates to a method for verifying one or more exceptions in a logic circuit comprising the steps of: a first step of providing an initial representation of a logic circuit; a second step of indicating at least one exception for the logic circuit; a third step of introducing one or more potential malfunctions of the logic circuit related to the one or more exceptions into the representation of the logic circuit to produce a modified representation of the logic circuit; a fourth step of determining whether functional behaviour of the modified representation of the logic circuit differs from functional behaviour of the first representation of the logic circuit; and a fifth step of reporting a result relating to the difference in the functional behaviour of the modified representation of the logic circuit from the functional behaviour of the initial representation of the logic circuit.
公开/授权文献
- EP1916534B1 Verification and generation of timing exceptions 公开/授权日：2009-12-16
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