Multistage ADC (1) for converting in multi- step cycles, analogue samples (V] n) of an input signal (VIn) into digital codes (Dout) each cycle resolving at least one bit of digital code (Dout), the converter (1) including: - a generation block (3) of a pseudorandom sequence (Y' ts) to be summed to said analogue samples, obtaining a second sequence ( V+in) of analog samples; - conversion means (5) with controllable digital gain ( g ), receiving the second sequence (V+in) and outputting bits of said digital codes (Dout); - a feedback loop (2, 6, 7, 8) for performing said multi- step conversion cycles, with a loop gain (GLoop); - a digital calibration block (9) matching the digital gain ( g ) to the loop gain ( GLoop ); said second sequence (V+in) including predetermined samples with no contribution of said pseudorandom sequence (?-ts); - a prediction block (10) to produce a digital estimation (Dout) of said input signal (Vin).