发明公开
EP2326008A1 A simple self-adjusting overvoltage-protection circuit for low voltage CMOS input and output interface circuits with high voltage tolerance and with full rail-to-rail bidirectional voltage levels
审中-公开
用于低电压CMOS输入和Ausgabeschnitstellenschaltungen高电压耐受性和与双向总线的电压电平的简单的自调整浪涌保护电路
- 专利标题： A simple self-adjusting overvoltage-protection circuit for low voltage CMOS input and output interface circuits with high voltage tolerance and with full rail-to-rail bidirectional voltage levels
- 专利标题（中）： 用于低电压CMOS输入和Ausgabeschnitstellenschaltungen高电压耐受性和与双向总线的电压电平的简单的自调整浪涌保护电路
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申请号： EP10191400.0申请日： 2010-11-16
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公开(公告)号： EP2326008A1公开(公告)日： 2011-05-25
- 发明人: Mann, Allen James , Mahooti, Kevin
- 申请人： NXP B.V.
- 申请人地址： High Tech Campus 60 5656 AG Eindhoven NL
- 专利权人： NXP B.V.
- 当前专利权人： NXP B.V.
- 当前专利权人地址： High Tech Campus 60 5656 AG Eindhoven NL
- 代理机构： Burton, Nick
- 优先权： US623214 20091120
- 主分类号： H03K19/003
- IPC分类号： H03K19/003
摘要：
A modified CMOS switch (402), composed of parallel N-channel (410) and P-channel (412) transistors, is placed between the pad (14) and the input buffer and/or output devices (404). The applied pad voltage relative to V DD determines the configuration of the switch (402), and also, the P-channel floating-well bias-voltage (nw). For the applied pad voltage above V DD , only the N-channel device (410) is on and the P-channel device (412,414) is off. In this configuration the N-channel limits the input voltage on the buffer side to (V DD -V TN ), and therefore, acts as the over-voltage protection device. For pad voltages at and below V DD , both the N-channel (410) and the P-channel devices (414) are on, and the voltage-levels on both sides of the protection structure are the same.
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