发明公开
EP2611950A1 PROCESS FOR ELECTRODEPOSITION OF COPPER CHIP TO CHIP, CHIP TO WAFER AND WAFER TO WAFER INTERCONNECTS IN THROUGH-SILICON VIAS (TSV) WITH HEATED SUBSTRATE AND COOLED ELECTROLYTE 有权
对铜化合物CHIP芯片,晶圆芯片的电气隔离和在TSV的晶片到晶片(通过硅通孔)中的方法加热的衬底和冰鲜电解质。

  • 专利标题: PROCESS FOR ELECTRODEPOSITION OF COPPER CHIP TO CHIP, CHIP TO WAFER AND WAFER TO WAFER INTERCONNECTS IN THROUGH-SILICON VIAS (TSV) WITH HEATED SUBSTRATE AND COOLED ELECTROLYTE
  • 专利标题(中): 对铜化合物CHIP芯片,晶圆芯片的电气隔离和在TSV的晶片到晶片(通过硅通孔)中的方法加热的衬底和冰鲜电解质。
  • 申请号: EP11760829.9
    申请日: 2011-07-08
  • 公开(公告)号: EP2611950A1
    公开(公告)日: 2013-07-10
  • 发明人: PREISSER, Robert, F.
  • 申请人: Atotech Deutschland GmbH
  • 申请人地址: Erasmusstrasse 20 10553 Berlin DE
  • 专利权人: Atotech Deutschland GmbH
  • 当前专利权人: Atotech Deutschland GmbH
  • 当前专利权人地址: Erasmusstrasse 20 10553 Berlin DE
  • 代理机构: Wonnemann, Jörg
  • 优先权: US845801 20100729
  • 国际公布: WO2012014029 20120202
  • 主分类号: C25D3/38
  • IPC分类号: C25D3/38 C25D5/00 C25D7/12 C25D21/02 H01L21/288 H01L21/768
PROCESS FOR ELECTRODEPOSITION OF COPPER CHIP TO CHIP, CHIP TO WAFER AND WAFER TO WAFER INTERCONNECTS IN THROUGH-SILICON VIAS (TSV) WITH HEATED SUBSTRATE AND COOLED ELECTROLYTE
摘要:
Process of electrodepositing a metal in a high aspect ratio via in a silicon substrate to form a through-silicon-via (TSV), utilizing an electrolytic bath including a redox mediator, in an electrolytic metal plating system including a chuck adapted to hold the silicon substrate and to heat the silicon substrate to a first temperature, a temperature control device to maintain temperature of the electrolytic bath at a second temperature, in which the first temperature is maintained in a range from about 30° C. to about 60° C. and the second temperature is maintained at a temperature (a) at least 5° C. lower than the first temperature and (b) in a range from about 15° C. to about 35° C.
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