发明公开
EP2889903A1 Die with a multilayer backside interface layer for solder bonding to a substrate and corresponding manufacturing method 审中-公开
芯片与多层背面用于向基板钎焊连接和相应的生产方法

  • 专利标题: Die with a multilayer backside interface layer for solder bonding to a substrate and corresponding manufacturing method
  • 专利标题(中): 芯片与多层背面用于向基板钎焊连接和相应的生产方法
  • 申请号: EP13199587.0
    申请日: 2013-12-24
  • 公开(公告)号: EP2889903A1
    公开(公告)日: 2015-07-01
  • 发明人: van Rijckevorsel, Johannes Wilhelmusde Bruin, Emiel
  • 申请人: NXP B.V.
  • 申请人地址: High Tech Campus 60 5656 AG Eindhoven NL
  • 专利权人: NXP B.V.
  • 当前专利权人: NXP B.V.
  • 当前专利权人地址: High Tech Campus 60 5656 AG Eindhoven NL
  • 代理机构: Crawford, Andrew
  • 主分类号: H01L23/482
  • IPC分类号: H01L23/482 H01L21/60 H01L23/66
Die with a multilayer backside interface layer for solder bonding to a substrate and corresponding manufacturing method
摘要:
A die (1) comprising a body (3) of semiconductor material, said body (3) configured to receive a solder layer (4) of e.g. an alloy of gold and tin for use in die bonding said die (1) to a substrate (2), wherein the die includes an interface layer (5) on a surface of the body (3) for receiving the solder layer (4), the interface layer (5) having a plurality of sub-layers (5a, 5b, 5c, 5d) of different metals. The interface layer (5) preferably comprises a first sub-layer (5a) of gold applied to the body (3), a second sub-layer (5b) of silver, a third sub-layer (5c) of nickel and a fourth sub-layer (5d) of gold adjoining the solder layer (4). The substrate (2) is preferably made of a copper substrate block (6) with a pad (7) of silver thereon, the substrate (6) and the pad (7) being plated with an outer layer (8) comprising sub-layers of nickel, palladium and gold.
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