发明公开
EP3062341A3 SEMICONDUCTOR DEVICE WITH AN ELECTRODE STRUCTURE COMPRISING AN ALUMINIUM OR ALUMINIUM ALLOY LAYER WITH {110} TEXTURE, METHOD OF MANUFACTURING SAID SEMICONDUCTOR DEVICE AND POWER CONVERSION DEVICE COMPRISING SAID SEMICONDUCTOR DEVICE 审中-公开
与电极结构的半导体元件,包括铝或铝合金层{110}织构,用于生产半导体部件和功率转换装置,其包括半导体元件

SEMICONDUCTOR DEVICE WITH AN ELECTRODE STRUCTURE COMPRISING AN ALUMINIUM OR ALUMINIUM ALLOY LAYER WITH {110} TEXTURE, METHOD OF MANUFACTURING SAID SEMICONDUCTOR DEVICE AND POWER CONVERSION DEVICE COMPRISING SAID SEMICONDUCTOR DEVICE
摘要:
A semiconductor device (200, 300, 400) includes a semiconductor substrate (108, 208) in which a semiconductor element (150) is formed, an electrode structure (151, 202, 207) provided on a first surface (108d) of the semiconductor substrate (108, 208) to be electrically connected to the semiconductor element (150) and in which a first Al metal layer (105) composed of Al or Al alloy, a Cu diffusion-prevention layer (107) composed of e.g. Ti, TiN, TiW or W, a second Al metal layer (106) composed of Al or Al alloy and a Ni, Cu or Cu alloy layer (104) are formed in this order, and a conductive member (102) which is bonded to the electrode structure (151, 202, 207) via a sintered copper layer (103) disposed on a surface (104a) of the Ni, Cu or Cu alloy layer (104). In this semiconductor device, a crystal plane orientation of Al crystal grains on a surface (106a) of the second Al metal layer (106) is principally on the (110) plane. The semiconductor device (200) may comprise a second electrode structure (152) on the second surface (108e) of the semiconductor substrate (108), also formed of the layers (105), (107), (106) and (104) and bonded to a conductive member (102) via a sintered copper layer (103). Alternatively, the semiconductor device (300, 400) may comprise a plurality of semiconductor elements such as transistors, diodes and resistive elements formed on a semiconductor LSI chip (201, 205, 206) and a plurality of input/output electrode pads (202, 207) each formed of the layers (105), (107), (106) and (104). The LSI chip (201, 205, 206) may be bonded to another semiconductor LSI chip (205, 206), also having electrode pads (202, 207) formed of the layers (105), (107), (106) and (104), and/or to a conductive member (102) via a sintered copper layer (103).
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