A Receiver (17) that receives a load modulated analog input signal (19) and outputs digital data (20) detected in the input signal (19), which receiver (17) comprises: an in-phase mixer (21) that mixes the input signal (19) with an in-phase carrier frequency (22) and provides an in-phase component (23) of the down-converted input signal and a quadrature-phase mixer (24) that mixes the input signal (19) with a quadrature-phase carrier frequency (25) and provides a quadrature-phase component (26) of the down-converted input signal; an amplifier (29, 30) to amplify the in-phase component (23) and the quadrature-phase component (26) of the down-converted input signal; a DC block filter (31) to remove the DC component of the in-phase component (23) and the quadrature-phase component (26), wherein the receiver furthermore comprises: an in-phase correlator (33, 34) and a quadrature-phase correlator (35, 36) for each of the in-phase component (23) and the quadrature-phase component (26) to correlate the in-phase component (23) and the quadrature-component (26) with an in-phase component (37) and a quadrature-phase component (38) of a subcarrier or code clock frequency of the input signal (19); a combiner (41) to combine four output signals (48 to 51) of the two in-phase correlators (33, 34) and the two quadrature-phase correlators (35, 36); a slicer (43) to sample an output signal (42) of the combiner (41) at maximum energy levels to output the digital data (20) detected in the input signal (19).