发明公开
- 专利标题: HIGH-MOBILITY SEMICONDUCTOR SOURCE/DRAIN SPACER
- 专利标题(中): 高迁移率半导体源/漏极隔离器
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申请号: EP15896570.7申请日: 2015-06-26
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公开(公告)号: EP3314666A1公开(公告)日: 2018-05-02
- 发明人: DEWEY, Gilbert , METZ, Matthew V. , MURTHY, Anand S. , GHANI, Tahir , RACHMADY, Willy , MOHAPATRA, Chandra S. , KAVALIEROS, Jack T. , GLASS, Glenn A.
- 申请人: INTEL Corporation
- 申请人地址: 2200 Mission College Blvd. Santa Clara, CA 95054 US
- 专利权人: INTEL Corporation
- 当前专利权人: INTEL Corporation
- 当前专利权人地址: 2200 Mission College Blvd. Santa Clara, CA 95054 US
- 代理机构: Goddar, Heinz J.
- 国际公布: WO2016209284 20161229
- 主分类号: H01L29/78
- IPC分类号: H01L29/78 ; H01L21/336 ; H01L21/8238
摘要:
Monolithic FETs including a majority carrier channel in a first high carrier mobility semiconductor material disposed over a substrate. While a mask, such as a gate stack or sacrificial gate stack, is covering a lateral channel region, a spacer of a high carrier mobility semiconductor material is overgrown, for example wrapping around a dielectric lateral spacer, to increase effective spacing between the transistor source and drain without a concomitant increase in transistor footprint. Source/drain regions couple electrically to the lateral channel region through the high-mobility semiconductor spacer, which may be substantially undoped (i.e. intrinsic). With effective channel length for a given lateral gate dimension increased, the transistor footprint for a given off-state leakage may be reduced or off-state source/drain leakage for a given transistor footprint may be reduced, for example.
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