Embodiments of a device include on-board memory, an applications processor, a digital signal processor cluster, a configurable accelerator framework, and at least one communication bus architecture. The communication bus communicatively couples the applications processor, the digital signal processor cluster, and the configurable accelerator framework to the on-board memory. The configurable accelerator framework includes a reconfigurable stream switch and a data volume sculpting unit, which has an input and an output coupled to the reconfigurable stream switch. The data volume sculpting unit has a counter, a comparator, and a controller. The data volume sculpting unit is arranged to receive (1004) a stream of feature map data that forms a three-dimensional feature map. The three-dimensional feature map is formed as a plurality of two-dimensional data planes.