- 专利标题: METHOD FOR MANUFACTURING DEVICE FABRICATION WAFER
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申请号: EP19862939.6申请日: 2019-09-19
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公开(公告)号: EP3854916A1公开(公告)日: 2021-07-28
- 发明人: YABUKI, Norihito , SAKAGUCHI, Takuya , JINNO, Akiko , NOGAMI, Satoru , KITABATAKE, Makoto
- 申请人: Toyo Tanso Co., Ltd.
- 申请人地址: JP Osaka-shi, Osaka 555-0011 7-12, Takeshima 5-chome Nishiyodogawa-ku
- 代理机构: TBK
- 优先权: JP2018209202 20181106
- 国际公布: WO2020059810 20200326
- 主分类号: C30B29/36
- IPC分类号: C30B29/36 ; C30B33/02 ; H01L21/265 ; H01L21/324
摘要:
In a method for manufacturing a device fabrication wafer 43, an SiC epitaxial wafer 42 that is an SiC wafer 40 having a monocrystalline SiC epitaxial layer 41 formed thereon is subjected to a basal plane dislocation density reduction step of reducing the density of basal plane dislocations existing in the epitaxial layer of the SiC epitaxial wafer 42, to thereby manufacture the device fabrication wafer 43 for use to fabricate a semiconductor device. In the basal plane dislocation density reduction step, the SiC epitaxial wafer 42 is heated under Si vapor pressure for a predetermined time necessary to reduce the density of basal plane dislocations, without formation of a cap layer on the SiC epitaxial wafer 42, so that the density of basal plane dislocations is reduced with suppression of surface roughening.
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