- 专利标题: ADVANCED LINK POWER MANAGEMENT FOR DISPLAYPORT
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申请号: EP21198428.1申请日: 2021-09-23
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公开(公告)号: EP4016520A1公开(公告)日: 2022-06-22
- 发明人: ANSARI, Nausheen , KABIRY, Ziv , YEDIDIA, Gal
- 申请人: INTEL Corporation
- 申请人地址: US Santa Clara, CA 95054 2200 Mission College Blvd.
- 代理机构: Rummler, Felix
- 优先权: US202017127417 20201218
- 主分类号: G09G5/00
- IPC分类号: G09G5/00 ; G06F1/3234
摘要:
An apparatus comprising circuitry to buffer video data; and a DisplayPort Transmitter to communicate the video data to a DisplayPort Receiver via a virtual channel through at least one intermediate device between the DisplayPort Transmitter and the DisplayPort Receiver, wherein the virtual channel comprises a unidirectional Main-Link and a bidirectional auxiliary channel (AUX_CH); and communicate a power down signal over the Main-Link to the at least one intermediate device and the DisplayPort Receiver in conjunction with turning off the Main-Link to place the at least one intermediate device and the DisplayPort Receiver in respective low power states.
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