A controller (400) including a non-volatile memory interface circuit (460) connected to at least one non-volatile memory device (300) and configured to control the at least one non-volatile memory device (300); an error correction circuit (430) configured to perform an error correction operation on a codeword received from the non-volatile memory interface circuit (460) according to an error correction decoding level from among a plurality of error correction decoding levels, wherein the non-volatile memory interface circuit (460) is further configured to: receive side information from the at least one non-volatile memory device (300); predict a distribution of memory cells based on the side information; and select the error correction decoding level from among the plurality of error correction decoding levels according to the predicted distribution.