- 专利标题： SELF-TEST CONTROLLER, AND ASSOCIATED METHOD
-
申请号： EP22160907.6申请日： 2022-03-08
-
公开(公告)号： EP4063879A2公开(公告)日： 2022-09-28
- 发明人: PANDEY, Amulya , SONI, Mr. Balwinder Singh , ANAND, Amritanshu , SRINIVASAN, V Narayanan
- 申请人： STMicroelectronics International N.V.
- 申请人地址： CH 1228 Plan-les-Ouates, Geneva Chemin du Champ des Filles 39
- 代理机构： Bosotti, Luciano
- 优先权： US202117208935 20210322
- 主分类号： G01R31/317
- IPC分类号： G01R31/317 ; G01R31/3187
摘要：
A method for managing self-tests in an integrated circuit, IC comprises:
receiving (1004) built-in-self-test, BIST configuration data;
configuring (1002) a first clock to a first frequency based on the BIST configuration data;
performing (1012) a first BIST test at the first frequency;
configuring (1006) a second clock to a second frequency that is different from the first frequency; and
performing (1012) a second BIST test at the second frequency.
receiving (1004) built-in-self-test, BIST configuration data;
configuring (1002) a first clock to a first frequency based on the BIST configuration data;
performing (1012) a first BIST test at the first frequency;
configuring (1006) a second clock to a second frequency that is different from the first frequency; and
performing (1012) a second BIST test at the second frequency.
公开/授权文献
- EP4063879A3 SELF-TEST CONTROLLER, AND ASSOCIATED METHOD 公开/授权日：2022-12-07
信息查询
