Invention Publication
- Patent Title: DYNAMIC PRECISION FOR NEURAL NETWORK COMPUTE OPERATIONS
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Application No.: EP24166744.3Application Date: 2018-03-19
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Publication No.: EP4369252A3Publication Date: 2024-07-24
- Inventor: SINHA, Kamal , VEMBU, Balaji , NURVITADHI, Eriko , GALOPPO VON BORRIES, Nicolas C. , BARIK, Rajkishore , LIN, Tsung-Han , RAY, Joydeep , TANG, Ping T. , STRICKLAND, Michael S. , CHEN, Xiaoming , YAO, Anbang , SHPEISMAN, Tatiana , APPU, Abhishek R. , KOKER, Altug , AKHBARI, Farshad , SRINIVASA, Narayan , CHEN, Feng , KIM, Dukhwan , SATISH, Nadathur Rajagopalan , WEAST, John C. , MACPHERSON, Mike B. , HURD, Linda L. , RANGANATHAN, Vasanth , JAHAGIRDAR, Sanjeev S.
- Applicant: INTEL Corporation
- Applicant Address: US Santa Clara, CA 95054 2200 Mission College Blvd.
- Assignee: INTEL Corporation
- Current Assignee: INTEL Corporation
- Current Assignee Address: US Santa Clara, CA 95054 2200 Mission College Blvd.
- Agency: Goddar, Heinz J.
- Priority: US 1715495020 2017.04.24
- The original application number of the division: 18162628.4 2018.03.19
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F15/76 ; G06F15/78 ; G06F1/32 ; G06F1/3287 ; G06F1/3293 ; G06T1/20 ; G06T15/00 ; G06N3/044 ; G06N3/045 ; G06N3/063 ; G06N3/084
Abstract:
In an example, an apparatus comprises a compute engine comprising a high precision component and a low precision component; and logic, at least partially including hardware logic, to receive instructions in the compute engine; select at least one of the high precision component or the low precision component to execute the instructions; and apply a gate to at least one of the high precision component or the low precision component to execute the instructions. Other embodiments are also disclosed and claimed.
Public/Granted literature
- EP4369252A2 DYNAMIC PRECISION FOR NEURAL NETWORK COMPUTE OPERATIONS Public/Granted day:2024-05-15
Information query
