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公开(公告)号:EP4369252A3
公开(公告)日:2024-07-24
申请号:EP24166744.3
申请日:2018-03-19
申请人: INTEL Corporation
发明人: SINHA, Kamal , VEMBU, Balaji , NURVITADHI, Eriko , GALOPPO VON BORRIES, Nicolas C. , BARIK, Rajkishore , LIN, Tsung-Han , RAY, Joydeep , TANG, Ping T. , STRICKLAND, Michael S. , CHEN, Xiaoming , YAO, Anbang , SHPEISMAN, Tatiana , APPU, Abhishek R. , KOKER, Altug , AKHBARI, Farshad , SRINIVASA, Narayan , CHEN, Feng , KIM, Dukhwan , SATISH, Nadathur Rajagopalan , WEAST, John C. , MACPHERSON, Mike B. , HURD, Linda L. , RANGANATHAN, Vasanth , JAHAGIRDAR, Sanjeev S.
IPC分类号: G06F9/30 , G06F15/76 , G06F15/78 , G06F1/32 , G06F1/3287 , G06F1/3293 , G06T1/20 , G06T15/00 , G06N3/044 , G06N3/045 , G06N3/063 , G06N3/084
CPC分类号: G06F15/78 , G06F9/30014 , G06F9/30036 , G06F1/3287 , G06F1/3293 , G06T15/005 , G06F15/76 , G06N3/084 , G06N3/063 , G06T1/20 , Y02D10/00 , G06N3/044 , G06N3/045
摘要: In an example, an apparatus comprises a compute engine comprising a high precision component and a low precision component; and logic, at least partially including hardware logic, to receive instructions in the compute engine; select at least one of the high precision component or the low precision component to execute the instructions; and apply a gate to at least one of the high precision component or the low precision component to execute the instructions. Other embodiments are also disclosed and claimed.
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公开(公告)号:EP4160413A1
公开(公告)日:2023-04-05
申请号:EP22204509.8
申请日:2018-03-26
申请人: INTEL Corporation
发明人: OULD-AHMED-VALL, ElMoustapha , BAGHSORKHI, Sara S. , YAO, Anbang , NEALIS, Kevin , CHEN, Xiaoming , KOKER, Altug , APPU, Abhishek R. , WEAST, John C. , MACPHERSON, Mike B. , KIM, Dukhwan , HURD, Linda L. , ASHBAUGH, Ben J. , LAKSHMANAN, Barath , MA, Liwei , RAY, Joydeep , TANG, Ping T. , STRICKLAND, Michael S.
IPC分类号: G06F9/50 , G06T15/00 , G06F9/30 , G06F9/38 , G06N3/04 , G06N3/063 , G06N3/08 , G06T1/20 , G06F12/0811 , G06N3/045 , G06N3/084 , G06N3/044
摘要: In some example embodiments, there may be provided a multi-chip module accelerator usable to execute tensor data processing operations, the multi-chip module accelerator comprising a multi-chip module comprising a memory stack including multiple memory dies; and parallel processor circuitry communicatively coupled to the memory stack. The parallel processor circuitry comprising multiprocessor cores to execute matrix multiplication and accumulate operations, wherein the matrix multiplication and accumulate operations comprise floating-point operations; the floating-point operations are configurable to comprise two-dimensional matrix multiply and accumulate operations involving inputs that have differing floating-point precisions; the floating-point operations comprise a first operation at a first precision and a second operation at a second precision; and the first operation comprises a multiply having at least one 16-bit floating-point input and the second operation comprises an accumulate having a 32-bit floating-point input. Related systems, non-transitory machine-readable storage medium, methods and articles of manufacture are also described.
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公开(公告)号:EP4002068A1
公开(公告)日:2022-05-25
申请号:EP22150728.8
申请日:2018-04-17
申请人: INTEL Corporation
发明人: BARAN, Stanley J. , APPU, Abhishek R. , LEE, Sang-Hee , MOHAMMED, Atthar H. , OH, Jong Dae , CHAN, Hiu-Fai R. , RAY, Joydeep , DAS, Barnan , SHARMA, Archie , HICKS, Richmond , WANG, Changliang , AVADHANAM, Satyanarayana , JOHNSTON, Robert J. , BISWAL, Narayan
IPC分类号: G06F3/01 , H04N5/232 , H04N21/2343 , H04N19/17 , H04N5/225 , H04N13/243 , H04N13/25 , H04N13/271 , H04N13/344 , H04N13/383 , H04N19/167 , H04N19/179 , H04N21/218 , H04N21/4223 , H04N21/4402 , H04N21/442 , H04N21/4728 , H04N19/132 , H04N21/81
摘要: Systems and methods may provide for capturing 360 degree video, and multi-resolution encoding, processing and displaying of the video based on a field of view (FOV) and region of interest (ROI) for a viewer. The ROI may be determined based on eye tracking information (ETI) and the video may be encoded for viewports within the FOV at a high resolution and for other viewports outside the FOV at a lower resolution. ROI in the video may be encoded at a high resolution and areas outside of the ROI may be encoded at a lower resolution. The ETI enables the selective display of one or more warnings based on the gaze of a user to improve the efficiency of the warning. 3D glasses having variable lens may be used to adjust the focal distance of a virtual display to match a virtual distance of an object based on stereo distance cues.
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公开(公告)号:EP3435672A2
公开(公告)日:2019-01-30
申请号:EP18167864.0
申请日:2018-04-17
申请人: INTEL Corporation
发明人: JOHNSTON, Robert J. , APPU, Abhishek R. , BARAN, Stanley J. , LEE, Sang-Hee , MOHAMMED, Atthar H. , OH, Jong Dae , CHAN, Hiu-Fai R. , RAY, Joydeep
IPC分类号: H04N19/107 , G11B27/00 , G06T9/00 , H04N21/00 , H04N19/124 , H04N19/137 , H04N19/182 , H04N19/17 , H04N19/167
摘要: Image information is often transmitted from one electronic device to another. Such information is typically encoded and/or compressed to reduce the bandwidth required for transmission and/or to decrease the time necessary for transmission. Embodiments are directed to tagging objects or primitives with attribute tags to facilitate the encoding process. Other embodiments are directed to codecs running on hardware and/or software.
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公开(公告)号:EP3389272A3
公开(公告)日:2018-12-12
申请号:EP18165270.2
申请日:2018-03-29
申请人: INTEL Corporation
发明人: MOHAMMED, Atthar H. , APPU, Abhishek R. , BARAN, Stanley J. , LEE, Sang-Hee , OH, Jong Dae , CHAN, Hiu-Fai R. , RAY, Joydeep , BISWAL, Narayan , HICKS, Richmond , RUNYAN, Arthur J. , ANSARI, Nausheen
IPC分类号: H04N19/142 , H04N19/895 , H04N5/14 , H04N19/87 , G06T7/254 , H04N21/4402 , H04N21/442
CPC分类号: H04N19/142 , G06T7/254 , H04N5/147 , H04N19/174 , H04N19/87 , H04N19/895 , H04N21/440281 , H04N21/44209
摘要: Systems, apparatuses and methods may include a source device that generates a scene change notification in response to a movement of a camera, modifies an encoding scheme associated with the video content captured by the camera in response to the scene change notification, identifies a full-frame difference threshold, wherein scene analysis information includes frame difference data, and compares the frame difference data to an intermediate threshold that is less than the full-frame difference threshold, wherein the scene change notification is generated when the frame difference data exceeds the intermediate threshold. A sink device may obtain transport quality data associated with video content, modify an output parameter of a display based on the transport quality data, determine a view perspective of a still image containing a plurality of image slices, retrieve only a subset of the plurality of image slices based on the view perspective and decode the retrieved subset.
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公开(公告)号:EP3401786A2
公开(公告)日:2018-11-14
申请号:EP18162597.1
申请日:2018-03-19
申请人: INTEL Corporation
发明人: LAKSHMANAN, Barath , HURD, Linda L. , ASHBAUGH, Ben J. , OULD-AHMED-VALL, Elmoustapha , MA, Liwei , JIN, Jingyi , GOTTSCHLICH, Justin E. , SAKTHIVEL, Chandrasekaran , STRICKLAND, Michael S. , LEWIS, Brian T. , KUPER, Lindsey , KOKER, Altug , APPU, Abhishek R. , SURTI, Prasoonkumar , RAY, Joydeep , VEMBU, Balaji , TUREK, Javier S. , FAROOQUI, Naila
IPC分类号: G06F9/50
CPC分类号: G07C5/008 , G01C21/3415 , G01C21/3492 , G01S19/13 , G05D1/0088 , G05D1/0257 , G06F9/5027 , G06F2209/509 , G06N99/005 , G08G1/0112 , G08G1/012 , G08G1/052 , H04L43/0852 , H04L43/16 , H04L67/12 , H04W28/08
摘要: One embodiment provides for a computing device within an autonomous vehicle, the compute device comprising a wireless network device to enable a wireless data connection with an autonomous vehicle network, a set of multiple processors including a general-purpose processor and a general-purpose graphics processor, the set of multiple processors to execute a compute manager to manage execution of compute workloads associated with the autonomous vehicle, the compute workload associated with autonomous operations of the autonomous vehicle, and offload logic configured to execute on the set of multiple processors, the offload logic to determine to offload one or more of the compute workloads to one or more autonomous vehicles within range of the wireless network device.
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公开(公告)号:EP3396941A1
公开(公告)日:2018-10-31
申请号:EP18168355.8
申请日:2018-04-19
申请人: INTEL Corporation
发明人: BARAN, Stanley J. , APPU, Abhishek R. , LEE, Sang-Hee , MOHAMMED, Atthar H. , OH, Jong Dae , CHAN, Hiu-Fai R. , RAY, Joydeep , PARIKH, Kunjal , WANG, Changliang , KAMBHATLA, Srikanth , SMITH, Gary , AVADHANAM, Satyanarayana , HICKS, Richmond , JOHNSTON, Robert J. , BISWAL, Narayan , BHATTACHARJEE, Susanta
IPC分类号: H04N5/235
CPC分类号: H04N5/2353 , H04N5/2355
摘要: Systems, apparatuses and methods may a performance-enhanced computing system. The performance-enhanced computing system comprises
a sensor (602) to measure luminance values corresponding to light focused onto the sensor at a plurality of pixel locations;
a memory (104, 222) including a set of instructions; and
a processor (102), wherein when executed by the processor, the instructions cause the system to:
periodically scan a plurality of detection images from the sensor while the senor remains enabled;
utilize a plurality of exposure estimates for each of the detection images to determine a plurality of shutter times; and
scan a plurality of capture images from the sensor for storage into a plurality of image buffers;
wherein the capture images include at least an under-exposed image, a well exposed image, and an over-exposed image.-
公开(公告)号:EP3396600A1
公开(公告)日:2018-10-31
申请号:EP18163730.7
申请日:2018-03-23
申请人: INTEL Corporation
发明人: SRINIVASA, Narayan , RAY, Joydeep , GALOPPO VON BORRIES, Nicolas C. , ASHBAUGH, Ben , SURTI, Prasoonkumar , CHEN, Feng , LAKSHMANAN, Barath , OULD-AHMED-VALL, Elmoustapha , MA, Liwei , HURD, Linda L. , APPU, Abhishek R. , WEAST, John C. , BAGHSORKHI, Sara S. , GOTTSCHLICH, Justin E. , SAKTHIVEL, Chandrasekaran , AKHBARI, Farshad , KIM, Dukhwan , KOKER, Altug , SATISH, Nadathur Rajagopalan
CPC分类号: G06N3/08 , G06N3/04 , G06N3/0454 , G06N3/063 , G06N3/082
摘要: An apparatus to facilitate optimization of a neural network (NN) is disclosed. The apparatus includes optimization logic to define a NN topology having one or more macro layers, adjust the one or more macro layers to adapt to input and output components of the NN and train the NN based on the one or more macro layers.
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公开(公告)号:EP3396545A1
公开(公告)日:2018-10-31
申请号:EP18163745.5
申请日:2018-03-23
申请人: INTEL Corporation
发明人: APPU, Abhishek R. , WEAST, John C. , BAGHSORKHI, Sara S. , GOTTSCHLICH, Justin E. , SURTI, Prasoonkumar , SAKTHIVEL, Chandrasekaran , KOKER, Altug , AKHBARI, Farshad , CHEN, Feng , KIM, Dukhwan , SRINIVASA, Narayan , SATISH, Nadathur Rajagopalan , SINHA, Kamal , RAY, Joydeep , VEMBU, Balaji , MACPHERSON, Mike B. , HURD, Linda L. , JAHAGIRDAR, Sanjeev , RANGANATHAN, Vasanth
IPC分类号: G06F9/50
CPC分类号: G05D1/0088 , G06F9/5016 , G06F9/5061 , G06N3/04 , G06N3/063 , G06N3/08
摘要: A mechanism is described for facilitating storage management for machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting one or more components associated with machine learning, where the one or more components include memory and a processor coupled to the memory, and where the processor includes a graphics processor. The method may further include allocating a storage portion of the memory and a hardware portion of the processor to a machine learning training set, where the storage and hardware portions are precise for implementation and processing of the training set.
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公开(公告)号:EP3396529A1
公开(公告)日:2018-10-31
申请号:EP18159839.2
申请日:2018-03-02
申请人: INTEL Corporation
发明人: APPU, Abhishek R. , KOKER, Altug , HURD, Linda L. , KIM, Dukhwan , MACPHERSON, Mike B. , WEAST, John C. , CHEN, Feng , AKHBARI, Farshad , SRINIVASA, Narayan , SATISH, Nadathur Rajagopalan , RAY, Joydeep , TANG, Ping T. , STRICKLAND, Michael S. , CHEN, Xiaoming , YAO, Anbang , SHPEISMAN, Tatiana
CPC分类号: G06T1/20 , G06F9/3001 , G06F9/3017 , G06F9/3851 , G06F9/3887 , G06F9/3895 , G06F9/46 , G06N3/063 , G06T15/005 , G06T15/04 , G09G5/363
摘要: An apparatus to facilitate compute optimization is disclosed. The apparatus includes sorting logic to sort processing threads into thread groups based on bit depth of floating point thread operations.
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