本揭示为有关于形成晶体管组件的方法及相关设备，晶体管组件具有包含夹层式薄膜叠层的信道区，夹层式薄膜叠层具有改善组件性能的复数个不同层。在一些实施例中，此方法透过选择性地蚀刻半导体基底以沿着半导体基底的上表面形成凹口实施。夹层式薄膜叠层具有复数个嵌入层形成于凹口内，这些嵌入层的至少两层包含不同的材料，以改善晶体管组件不同方面的性能。闸极结构形成于夹层式薄膜叠层上，闸极结构控制具有夹层式薄膜叠层之信道区内的电荷载子的流动，夹层式薄膜叠层横向地设置于半导体基底内的源极区与汲极区之间。

The present disclosure relates to a method of forming a transistor device having a channel region comprising a sandwich film stack with a plurality of different layers that improve device performance, and an associated apparatus. In some embodiments, the method is performed by selectively etching a semiconductor substrate to form a recess along a top surface of the semiconductor substrate. A sandwich film stack having a plurality of nested layers is formed within the recess. At least two of the nested layers include different materials that improve different aspects of the performance of the transistor device. A gate structure is formed over the sandwich film stack. The gate structure controls the flow of charge carriers in a channel region having the sandwich film stack, which is laterally positioned between a source region and a drain region disposed within the semiconductor substrate.