A memory device including a command window generator is provided. The command window generator is configured to generate a delay signal by converting a delay time between a clock signal input to a write path circuit and a clock signal output to a write path replica circuit into a number of cycles of an internal clock signal, by using the write path circuit and the write path replica circuit, and generate a command window to correspond to a data window using the delay signal. The delay window may correspond to a burst length of write data.