A semiconductor device comprises a semiconductor chip which includes at least one gate structure on a substrate, the gate structure including a first region, a second region different from the first region, and a third region between the first and the second region, a first redistribution layer on a top surface of the semiconductor chip, the first redistribution layer configured to electrically connect a first electrode pad of the semiconductor chip to a first solder ball and overlap the first region of the gate structure, a second redistribution layer on the top surface of the semiconductor chip, the second redistribution layer configured to electrically connect a second electrode pad of the semiconductor chip to a second solder ball and overlap the second region of the gate structure such that the third region is exposed, and an insulating layer on the first redistribution layer and the second redistribution layer.