Invention Grant
- Patent Title: Chained-instruction dispatcher
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Application No.: US14231028Application Date: 2014-03-31
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Publication No.: US10031758B2Publication Date: 2018-07-24
- Inventor: Frank J. Zappulla , Steven W. Zagorianakos , Rajesh Vaidheeswarran
- Applicant: Netronome Systems, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Netronome Systems, Inc.
- Current Assignee: Netronome Systems, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Imperium Patent Works LLP
- Agent T. Lester Wallace; Mark D. Marrello
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F9/30 ; G06F9/48 ; G06F21/72

Abstract:
A dispatcher circuit receives sets of instructions from an instructing entity. Instructions of the set of a first type are put into a first queue circuit, instructions of the set of a second type are put into a second queue circuit, and so forth. The first queue circuit dispatches instructions of the first type to one or more processing engines and records when the instructions of the set are completed. When all the instructions of the set of the first type have been completed, then the first queue circuit sends the second queue circuit a go signal, which causes the second queue circuit to dispatch instructions of the second type and to record when they have been completed. This process proceeds from queue circuit to queue circuit. When all the instructions of the set have been completed, then the dispatcher circuit returns an “instructions done” to the original instructing entity.
Public/Granted literature
- US20150277924A1 CHAINED-INSTRUCTION DISPATCHER Public/Granted day:2015-10-01
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