Invention Grant
- Patent Title: Power semiconductor arrangement having a plurality of power semiconductor switching elements and reduced inductance asymmetry
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Application No.: US15345751Application Date: 2016-11-08
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Publication No.: US10032755B2Publication Date: 2018-07-24
- Inventor: Daniel Domes , Reinhold Bayerer , Waleri Brekel
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Priority: DE102015119563 20151112; DE102016102744 20160217
- Main IPC: H01L25/11
- IPC: H01L25/11 ; H01L23/367 ; H01L23/495 ; H01L23/552 ; H01L23/64 ; H02M7/00 ; H05K7/20 ; H05K7/14

Abstract:
A multiplicity of power semiconductor switching elements of the same type parallel have a load current terminal for a load current input and a load current terminal for a load current output. At least one outer load current terminal and at least one inner load current terminal per load current direction include a load current input and a load current output. At least one contacting device for common electrical contacting all of the load current terminals of the same load current direction includes a load current input and a load current output. The contacting device includes a plurality of terminal tongues which are respectively fastened on an associated load current terminal. The geometry and/or profile of the terminal tongue of an outer load current terminal differs from the geometry and/or profile of the terminal tongue of an inner load current terminal of the same contacting device.
Public/Granted literature
Information query
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