- Patent Title: Display panel and a manufacturing method thereof, a TFT test method
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Application No.: US15322549Application Date: 2016-04-15
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Publication No.: US10036906B2Publication Date: 2018-07-31
- Inventor: Zuqiang Wang , Guang Li , Liang Sun , Xiaoyong Lu
- Applicant: Boe Technology Group Co., Ltd.
- Applicant Address: CN Beijing
- Assignee: BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee: BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee Address: CN Beijing
- Agency: Calfee, Halter & Griswold LLP
- Priority: CN201510310072 20150608
- International Application: PCT/CN2016/079375 WO 20160415
- International Announcement: WO2016/197701 WO 20161215
- Main IPC: G02F1/13
- IPC: G02F1/13 ; G02F1/1362 ; G02F1/1333 ; H01L27/32 ; G01R31/28 ; G02F1/1368

Abstract:
A display panel which includes a display area and a peripheral area around the display area is provided. The peripheral area includes an electroluminescent layer test region, a TFT test region and a plurality of lead-out lines. The electroluminescent layer test region includes a plurality of thin film transistors having electroluminescent layers, a first test line connecting sources of the plurality of thin film transistors having electroluminescent layers, and a switch lead and a second test line connecting gates of the plurality of thin film transistors having electroluminescent layers. The TFT test region includes a plurality of thin film transistors. Each of the plurality of lead-out lines is used for connecting a source-drain metal layer of one thin film transistor in the electroluminescent layer test region and a source-drain metal layer of one thin film transistor in the TFT test region.
Public/Granted literature
- US20170168330A1 DISPLAY PANEL AND A MANUFACTURING METHOD THEREOF, A TFT TEST METHOD Public/Granted day:2017-06-15
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