Invention Grant
- Patent Title: Through silicon via device having low stress, thin film gaps and methods for forming the same
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Application No.: US15247513Application Date: 2016-08-25
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Publication No.: US10043764B2Publication Date: 2018-08-07
- Inventor: Huang Liu , Sarasvathi Thangaraju , Chun Yu Wong
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Williams Morgan, P.C.
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/48 ; H01L21/768 ; H01L21/48 ; H01L23/498 ; H01L25/07

Abstract:
Aspects of the present invention generally relate to approaches for forming a semiconductor device such as a TSV device having a “buffer zone” or gap layer between the TSV and transistor(s). The gap layer is typically filled with a low stress, thin film fill material that controls stresses and crack formation on the devices. Further, the gap layer ensures a certain spatial distance between TSVs and transistors to reduce the adverse effects of temperature excursion.
Public/Granted literature
- US20160372425A1 THROUGH SILICON VIA DEVICE HAVING LOW STRESS, THIN FILM GAPS AND METHODS FOR FORMING THE SAME Public/Granted day:2016-12-22
Information query
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