Invention Grant
- Patent Title: Buried interconnect for semiconductor circuits
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Application No.: US15247127Application Date: 2016-08-25
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Publication No.: US10043798B2Publication Date: 2018-08-07
- Inventor: Stefan Cosemans , Praveen Raghavan , Steven Demuynck , Julien Ryckaert
- Applicant: IMEC VZW
- Applicant Address: BE Leuven
- Assignee: IMEC VZW
- Current Assignee: IMEC VZW
- Current Assignee Address: BE Leuven
- Agency: Knobbe Martens Olson & Bear, LLP
- Priority: EP15183286 20150901
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L27/02 ; H01L21/8234 ; H01L21/768 ; H01L23/535 ; H01L21/74 ; H01L29/78

Abstract:
A semiconductor circuit comprises a Front End of Line (FEOL) comprising a plurality of transistors, each of which having a source region, a drain region and a gate region arranged between the source region and the drain region and comprising a gate electrode. The semiconductor circuit also comprises a buried interconnect that is arranged in the FEOL and electrically connected to the gate region from below through a bottom contact portion of the gate electrode. By using a buried interconnect the routing of the circuit may be facilitated.
Public/Granted literature
- US20170062421A1 BURIED INTERCONNECT FOR SEMICONDUCTOR CIRCUITS Public/Granted day:2017-03-02
Information query
IPC分类: