Invention Grant
- Patent Title: Semiconductor device and a method for manufacturing a semiconductor device
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Application No.: US15789191Application Date: 2017-10-20
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Publication No.: US10050142B2Publication Date: 2018-08-14
- Inventor: Tatsuo Nakayama , Hironobu Miyamoto , Ichiro Masumoto , Yasuhiro Okamoto , Shinichi Miyake , Hiroshi Kawaguchi
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Koutou-ku, Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Koutou-ku, Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2014-176367 20140829
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/78 ; H01L29/423 ; H01L29/20

Abstract:
The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity.
Public/Granted literature
- US20180061983A1 SEMICONDUCTOR DEVICE AND A METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE Public/Granted day:2018-03-01
Information query
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