A phase locked loop circuit that is capable of stabilizing a frequency of an input signal even in the case where the frequency is unstable is provided. The phase locked loop circuit that corrects a frequency error of an output signal from an oscillator to a predetermined target frequency; an ADC that converts the output signal to a digital signal; reference frequency output means that outputs a reference frequency signal; frequency error detection means that detects the frequency error based on the digital signal and the reference frequency signal; correction signal generation means that generates an error correction signal based on the frequency error; a DAC that converts the error correction signal to an analog signal; and a multiplier that multiplies the output signal by the analog signal to correct the frequency error of the output signal.