Invention Grant
- Patent Title: Overlay circuit structure for interconnecting light emitting semiconductors
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Application No.: US14579569Application Date: 2014-12-22
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Publication No.: US10070531B2Publication Date: 2018-09-04
- Inventor: Arun Virupaksha Gowda , Donald Paul Cunningham , Shakti Singh Chauhan
- Applicant: General Electric Company
- Applicant Address: US NY Schenectady
- Assignee: General Electric Company
- Current Assignee: General Electric Company
- Current Assignee Address: US NY Schenectady
- Agency: Ziolkowski Patent Solutions Group, SC
- Main IPC: H01L33/00
- IPC: H01L33/00 ; H05K1/18 ; H01L25/075 ; H01L33/62 ; H01L27/15 ; H01L33/60 ; H01L33/64 ; H05K1/02

Abstract:
A system and method for packaging light emitting semiconductors (LESs) is disclosed. An LES device is provided that includes a heatsink and an array of LES chips mounted on the heatsink and electrically connected thereto, with each LES chip comprising connection pads and a light emitting area configured to emit light therefrom responsive to a received electrical power. The LES device also includes a flexible interconnect structure positioned on and electrically connected to each LES chip to provide for control LES operation of the array of LES chips, with the flexible interconnect structure further including a flexible dielectric film configured to conform to a shape of the heatsink and a metal interconnect structure formed on the flexible dielectric film and that extends through vias formed in the flexible dielectric film so as to be electrically connected to the connection pads of the LES chips.
Public/Granted literature
- US20150108513A1 OVERLAY CIRCUIT STRUCTURE FOR INTERCONNECTING LIGHT EMITTING SEMICONDUCTORS Public/Granted day:2015-04-23
Information query
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