Invention Grant
- Patent Title: Substrate, semiconductor package structure and manufacturing process
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Application No.: US15349954Application Date: 2016-11-11
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Publication No.: US10074602B2Publication Date: 2018-09-11
- Inventor: Chih Cheng Lee
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Agent Cliff Z. Liu
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/498 ; H01L23/31 ; H01L21/683 ; H01L21/56 ; H01L21/768

Abstract:
A substrate includes a first conductive structure, a second conductive structure attached to the first conductive structure and a third conductive structure attached to the second conductive structure. The first conductive structure includes a first dielectric layer and a first circuit layer embedded in the first dielectric layer. The second conductive structure includes at least one second dielectric layer disposed on a second surface of the first dielectric layer and at least one second circuit layer embedded in the second dielectric layer. The third conductive structure includes a third dielectric layer disposed on the second conductive structure and a third circuit layer disposed on the third dielectric layer. A material of the second dielectric layer is different from the a material of the first dielectric layer and a material of the third dielectric layer.
Public/Granted literature
- US20180138114A1 SUBSTRATE, SEMICONDUCTOR PACKAGE STRUCTURE AND MANUFACTURING PROCESS Public/Granted day:2018-05-17
Information query
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