Invention Grant
- Patent Title: Enhanced memory reliability in stacked memory devices
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Application No.: US15713439Application Date: 2017-09-22
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Publication No.: US10083079B2Publication Date: 2018-09-25
- Inventor: William C. Plants
- Applicant: Invensas Corporation
- Applicant Address: US CA San Jose
- Assignee: Invensas Corporation
- Current Assignee: Invensas Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G06F11/10 ; H03M13/29 ; G11C29/52
Abstract:
The invention pertains to semiconductor memories, and more particularly to enhancing the reliability of stacked memory devices. Apparatuses and methods are described for implementing RAID-style error correction to increase the reliability of the stacked memory devices.
Public/Granted literature
- US20180121283A1 Enhanced Memory Reliability in Stacked Memory Devices Public/Granted day:2018-05-03
Information query
