Invention Grant
- Patent Title: Trapping gate forming process and flash cell
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Application No.: US14807882Application Date: 2015-07-23
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Publication No.: US10096611B2Publication Date: 2018-10-09
- Inventor: Wen-Chung Chang , Sung-Bin Lin , Cherng-En Sun
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Main IPC: H01L27/115
- IPC: H01L27/115 ; H01L29/792 ; H01L27/1157 ; H01L29/423 ; H01L29/06

Abstract:
A trapping gate forming process includes the following. An oxide/nitride/oxide layer is formed on a substrate. A hard mask is formed to cover the oxide/nitride/oxide layer. The hard mask, the oxide/nitride/oxide layer and the substrate are patterned to form at least a trench in the hard mask, the oxide/nitride/oxide layer along a first direction. An isolation structure is formed in the trench. A first gate is formed across the oxide/nitride/oxide layer along a second direction orthogonal to the first direction. A flash cell formed by said process includes a substrate, a first gate and an oxide/nitride/oxide layer. The substrate contains at least an active area extending along a first direction. The first gate is disposed across the active area along a second direction orthogonal to the first direction, thereby intersecting an overlapping area. The oxide/nitride/oxide layer is disposed in the overlapping area between the first gate and the active area.
Public/Granted literature
- US20170025422A1 TRAPPING GATE FORMING PROCESS AND FLASH CELL Public/Granted day:2017-01-26
Information query
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