- 专利标题: Methods and apparatus for pattern matching using redundant memory elements
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申请号: US15841490申请日: 2017-12-14
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公开(公告)号: US10141055B2公开(公告)日: 2018-11-27
- 发明人: Luca De Santis , Tommaso Vali , Kenneth J. Eldredge , Vishal Sarin
- 申请人: MICRON TECHNOLOGY, INC.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Dicke, Billig & Czaja, PLLC
- 主分类号: G11C15/00
- IPC分类号: G11C15/00 ; G11C15/04 ; G11C16/10 ; G11C16/04 ; G11C29/52
摘要:
Methods include receiving a pattern to be searched in a memory having a plurality of sets of memory elements with each set coupled to a separate data line and corresponding to a same set of bit positions of the pattern. Methods further include receiving a pattern of data to be programmed into a memory, programming a first data state into one memory cell of each cell pair of a plurality of cell pairs of a memory array, and programing a second data state into another memory cell of each cell pair of the plurality of cell pairs for each bit position of the pattern. Memory configured to facilitate such methods include a plurality of cell pairs, each cell pair of the plurality of cell pairs programmed to store a same bit of data corresponding to a particular bit position of a pattern to be searched in the memory.
公开/授权文献
- US20180108415A1 METHODS AND APPARATUS FOR PATTERN MATCHING 公开/授权日:2018-04-19
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