- 专利标题: Correlation operation circuit and semiconductor device
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申请号: US15582865申请日: 2017-05-01
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公开(公告)号: US10152456B2公开(公告)日: 2018-12-11
- 发明人: Hiroshi Ueki
- 申请人: Renesas Electronics Corporation
- 申请人地址: JP Koutou-ku, Tokyo
- 专利权人: Renesas Electronics Corporation
- 当前专利权人: Renesas Electronics Corporation
- 当前专利权人地址: JP Koutou-ku, Tokyo
- 代理机构: Sughrue Mion, PLLC
- 优先权: JP2016-102500 20160523
- 主分类号: G06F17/15
- IPC分类号: G06F17/15 ; G06F7/544 ; G06F13/42 ; G11C11/419
摘要:
A correlation operation circuit includes a first SRAM storing a plurality of pieces of detection pattern data, product-sum operators, a second SRAM storing intermediate data, and a comparator. When time series data is sequentially input, the intermediate data of all correlation functions referring to one time series data in a period during which the one time series data is input. When one time series data is input, the product-sum operator multiplies the detection pattern data sequentially read from the first SRAM by the one input time series data. The corresponding intermediate data is read from the second SRAM in synchronization with the multiplication, and the sequentially-calculated products are cumulatively added to the read intermediate data to be written back into the second SRAM as the intermediate data. As a result, the calculated correlation function data is supplied to the comparator to be compared with a predetermined specified value.
公开/授权文献
- US20170337158A1 CORRELATION OPERATION CIRCUIT AND SEMICONDUCTOR DEVICE 公开/授权日:2017-11-23
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