Invention Grant
- Patent Title: Fractional-N phase locked loop delta sigma modulator noise reduction using charge pump interpolation
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Application No.: US15272307Application Date: 2016-09-21
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Publication No.: US10177772B2Publication Date: 2019-01-08
- Inventor: Jingcheng Zhuang , Xinhua Chen , Frederic Bossu , Yiwu Tang
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Qualcomm Incorporated/Seyfarth Shaw LLP
- Agent Alan M. Lenkin
- Main IPC: H03L7/087
- IPC: H03L7/087 ; H03L7/099 ; H03L7/197 ; H04L7/033 ; H03L7/089 ; H03L7/191
Abstract:
A phase locked loop has a frequency divider included in a feedback path. The frequency divider generates a first output and a delayed output. The phase locked loop also includes a charge pump to generate an output current based on the first output and the delayed output of the frequency divider.
Public/Granted literature
- US20180019756A1 FRACTIONAL-N PHASE LOCKED LOOP DELTA SIGMA MODULATOR NOISE REDUCTION USING CHARGE PUMP INTERPOLATION Public/Granted day:2018-01-18
Information query
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