- Patent Title: Delamination-resistant semiconductor device and associated method
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Application No.: US15642132Application Date: 2017-07-05
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Publication No.: US10199333B2Publication Date: 2019-02-05
- Inventor: Ying-Chih Kuo , Ying Chung
- Applicant: OmniVision Technologies, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: OmniVision Technologies, Inc.
- Current Assignee: OmniVision Technologies, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Lathrop Gage LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L27/146

Abstract:
A delamination-resistant semiconductor device includes a conductive layer, a semiconductor layer, and a spacer. The conductive layer has a first side opposite a second side. The semiconductor layer is on the first side and defines an aperture therethrough spanned by the conductive layer. The spacer is on the second side and has a top surface, proximate the conductive layer, that defines a blind hole spanned by the conductive layer. A method for preventing delamination of a multilayer structure, includes a step of disposing a first layer on a substrate such that the first layer spans an aperture of the substrate. The method also includes a step of disposing a second layer on the first layer. The second layer has a blind hole adjacent to the first layer such that the first layer spans the blind hole.
Public/Granted literature
- US20190013279A1 DELAMINATION-RESISTANT SEMICONDUCTOR DEVICE AND ASSOCIATED METHOD Public/Granted day:2019-01-10
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