- 专利标题: Apparatus and method for performing arithmetic operations to accumulate floating-point numbers
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申请号: US15370660申请日: 2016-12-06
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公开(公告)号: US10216479B2公开(公告)日: 2019-02-26
- 发明人: David Raymond Lutz , Neil Burgess , Christopher Neal Hinds , Andreas Due Engh-Halstvedt
- 申请人: ARM Limited
- 申请人地址: GB Cambridge
- 专利权人: ARM LIMITED
- 当前专利权人: ARM LIMITED
- 当前专利权人地址: GB Cambridge
- 代理机构: Nixon & Vanderhye PC
- 主分类号: G06F7/483
- IPC分类号: G06F7/483 ; G06F9/30 ; G06F7/499
摘要:
An apparatus and method are provided for performing arithmetic operations to accumulate floating-point numbers. The apparatus comprises execution circuitry to perform arithmetic operations, and decoder circuitry to decode a sequence of instructions. A convert and accumulate instruction is provided, and the decoder circuitry is responsive to decoding the convert and accumulate instruction to generate one or more control signals to control the execution circuitry to convert at least one floating-point operand identified by the convert and accumulate instruction into a corresponding N-bit fixed-point operand having M fraction bits, where M is less than N and M is dependent on a format of the floating-point operand. The execution circuitry accumulates each corresponding N bit fixed-point operand and a P bit fixed-point operand identified by the convert and accumulate instruction in order to generate a P bit fixed-point result value, where P is greater than N and also has M fraction bits.
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