Invention Grant
- Patent Title: Semiconductor device and its manufacturing method
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Application No.: US15626092Application Date: 2017-06-17
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Publication No.: US10217872B2Publication Date: 2019-02-26
- Inventor: Yoshiyuki Kawashima , Masao Inoue , Atsushi Yoshitomi
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2016-168823 20160831
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/792 ; H01L29/49 ; H01L29/66 ; H01L21/28 ; H01L29/78 ; H01L27/1157 ; H01L27/11573

Abstract:
A memory cell includes a control gate electrode and a memory gate electrode. The control gate electrode is formed over the upper surface and the sidewall of a fin FA including apart of a semiconductor substrate. The memory gate electrode is formed over one side surface of the control gate electrode and the upper surface and the sidewall of the fin through an ONO film, in a position adjacent to the one side surface of the control gate electrode. Further, the control gate electrode and the memory gate electrode are formed of n-type polycrystalline silicon. A first metal film is provided between the gate electrode and the control gate electrode. A second metal film is provided between the ONO film and the memory gate electrode. A work function of the first metal film is greater than a work function of the second metal film.
Public/Granted literature
- US20180061997A1 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD Public/Granted day:2018-03-01
Information query
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