Invention Grant
- Patent Title: PCB based semiconductor package with impedance matching network elements integrated therein
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Application No.: US15046923Application Date: 2016-02-18
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Publication No.: US10225922B2Publication Date: 2019-03-05
- Inventor: Qianli Mu , Cristian Gozzi , Asmita Dani
- Applicant: Infineon Technologies AG
- Applicant Address: US NC Durham
- Assignee: Cree, Inc.
- Current Assignee: Cree, Inc.
- Current Assignee Address: US NC Durham
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L21/60
- IPC: H01L21/60 ; H05K1/02 ; H01L23/498 ; H05K1/03 ; H05K1/11 ; H05K1/18 ; H01L23/13 ; H01L23/66 ; H05K1/16

Abstract:
A semiconductor package includes a metal baseplate having a die attach region and a peripheral region, a transistor die having a reference terminal attached to the die attach region and an RF terminal facing away from the baseplate, and a multilayer circuit board having a first side attached to the peripheral region and a second side facing away from the baseplate. The multilayer circuit board includes two embedded electrically conductive layers that are separated from the first and second sides by layers of composite fiber, and an embedded dielectric layer disposed between the two embedded electrically conductive layers. The embedded dielectric layer has a higher dielectric constant than the layers of composite fiber.
Public/Granted literature
- US20170245359A1 PCB Based Semiconductor Package with Impedance Matching Network Elements Integrated Therein Public/Granted day:2017-08-24
Information query
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