Invention Grant
- Patent Title: Digital interconnects with protocol-agnostic repeaters
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Application No.: US15607371Application Date: 2017-05-26
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Publication No.: US10235327B2Publication Date: 2019-03-19
- Inventor: Huimin Chen , Duane G. Quiet
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F13/38 ; G06F13/40 ; G06F13/42

Abstract:
A system and method is described for simplifying implementation of repeater (e.g., re-driver/re-timer) module implementation in high-data-rate interconnects that carry a relatively low-data-rate clock signal as well as the data stream (e.g., PCIe). At the endpoint, any information critical to the function of the repeater (e.g., the most recent data rate negotiated by a pair of endpoints communicating through the repeater) is embedded in the clock signal by pulse-width modulation as ordered sets. The repeater only needs to read the clock-embedded information rather than decoding the data stream. Thus repeaters for such applications reconstruct the high-rate data-stream while actually decoding only the low-rate clock signal. Because the clock-signal protocol is independent of the data-stream protocol, the repeater's operation is protocol-agnostic with respect to the data-stream.
Public/Granted literature
- US20170262403A1 DIGITAL INTERCONNECTS WITH PROTOCOL-AGNOSTIC REPEATERS Public/Granted day:2017-09-14
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