Invention Grant
- Patent Title: Low loss substrate for high data rate applications
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Application No.: US15152316Application Date: 2016-05-11
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Publication No.: US10236240B2Publication Date: 2019-03-19
- Inventor: Yuan-Hsi Chou , Tsun-Lung Hsieh , Chen-Chao Wang
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Agent Cliff Z. Liu
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/498
Abstract:
In one or more embodiments, a substrate includes a patterned conductive layer and a reference layer. The patterned conductive layer includes a pair of first conductive traces, a pair of second conductive traces and a reference trace between the pair of first conductive traces and the pair of second conductive traces. The reference layer is above the patterned conductive layer and defines an opening.
Public/Granted literature
- US20170330825A1 LOW LOSS SUBSTRATE FOR HIGH DATA RATE APPLICATIONS Public/Granted day:2017-11-16
Information query
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