Invention Grant
- Patent Title: Word line driver comprising NAND circuit
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Application No.: US15017879Application Date: 2016-02-08
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Publication No.: US10236884B2Publication Date: 2019-03-19
- Inventor: Takahiko Ishizu , Wataru Uesugi
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2015-023048 20150209
- Main IPC: G11C7/00
- IPC: G11C7/00 ; H03K19/0175 ; H03K19/00 ; G11C8/08 ; G11C11/412 ; G11C29/50

Abstract:
A semiconductor device with lower power consumption and an electronic device including the same are provided. To reduce leakage current flowing in a word line driver circuit, a switching element is provided, specifically, between the word line driver circuit and a high or low voltage power source. When there is no memory access, the switching element is turned off, thereby interrupting application of voltage (or current) from the high or low voltage power source to the word line driver circuit. Furthermore, to reduce the stand-by power due to precharge of a bit line, a switching element is provided in a bit line driver circuit, specifically, between the bit line and a high or low voltage power source. When there is no memory access, the switching element is turned off, thereby interrupting application of voltage (or current) from the high or low voltage power source to the bit line driver circuit.
Public/Granted literature
- US20160233866A1 SEMICONDUCTOR DEVICE OR ELECTRONIC DEVICE INCLUDING THE SAME Public/Granted day:2016-08-11
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