Invention Grant
- Patent Title: Verification of the resistance of an electronic circuit to side-channel attacks
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Application No.: US15046092Application Date: 2016-02-17
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Publication No.: US10243728B2Publication Date: 2019-03-26
- Inventor: Nicolas Bruneau
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMICROELECTRONICS (ROUSSET) SAS
- Current Assignee: STMICROELECTRONICS (ROUSSET) SAS
- Current Assignee Address: FR Rousset
- Agency: Seed IP Law Group LLP
- Priority: FR1558117 20150902
- Main IPC: H04L29/06
- IPC: H04L29/06 ; H04L9/00 ; H04L9/06 ; G09C1/00

Abstract:
A method of verifying the sensitivity of an electronic circuit executing a Rijndael-type algorithm to side channel attacks, wherein: each block of data to be encrypted or to be decrypted is masked with a first mask before a non-linear block substitution operation is applied based on a substitution box, and is then unmasked with a second mask after the substitution; the substitution box is recalculated, block by block, before the non-linear operation is applied, the processing order of the blocks of the substitution box being submitted to a permutation; and a side channel attack is performed on the steps of recalculating, block by block, the substitution box.
Public/Granted literature
- US20170063522A1 VERIFICATION OF THE RESISTANCE OF AN ELECTRONIC CIRCUIT TO SIDE-CHANNEL ATTACKS Public/Granted day:2017-03-02
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