Invention Grant
- Patent Title: Circuit and method for reading a memory cell of a non-volatile memory device
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Application No.: US15862397Application Date: 2018-01-04
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Publication No.: US10249373B2Publication Date: 2019-04-02
- Inventor: Giovanni Campardo , Salvatore Polizzi
- Applicant: STMicroelectronics S.r.l.
- Applicant Address: IT Agrate Brianza
- Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee Address: IT Agrate Brianza
- Agency: Slater Matsil, LLP
- Priority: IT102016000024496 20160309
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/26 ; G11C16/04 ; G11C16/08 ; G11C7/12 ; G11C7/18 ; G11C16/24 ; G11C16/28

Abstract:
A circuit for reading a memory cell of a non-volatile memory device provided with a memory array with cells arranged in wordlines and bitlines, among which a first bitline, associated to the memory cell, and a second bitline, has: a first circuit branch associated to the first bitline and a second circuit branch associated to the second bitline, each with a local node, coupled to which is a first dividing capacitor, and a global node, coupled to which is a second dividing capacitor; a decoder stage for coupling the local node to the first or second bitlines and coupling the global node to the local node; and a differential comparator stage supplies an output signal indicative of the datum stored; and a control unit for controlling the decoder stage, the coupling stage, and the differential comparator stage for generation of the output signal.
Public/Granted literature
- US20180130538A1 CIRCUIT AND METHOD FOR READING A MEMORY CELL OF A NON-VOLATILE MEMORY DEVICE Public/Granted day:2018-05-10
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