Invention Grant
- Patent Title: Method of manufacturing a semiconductor device
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Application No.: US15729374Application Date: 2017-10-10
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Publication No.: US10249595B2Publication Date: 2019-04-02
- Inventor: Tadatoshi Danno , Hiroyoshi Taya , Yoshiharu Shimizu
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2003-396996 20031127
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/48 ; H01L21/67 ; H01L23/498 ; H01L23/495 ; H01L23/28 ; H01L23/00 ; H01L21/56 ; H01L23/31 ; H01L23/544
Abstract:
A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
Public/Granted literature
- US20180047677A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE Public/Granted day:2018-02-15
Information query
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