- Patent Title: Multi-chassis link aggregation learning on standard ethernet links
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Application No.: US15635244Application Date: 2017-06-28
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Publication No.: US10250489B2Publication Date: 2019-04-02
- Inventor: Matty Kadosh , Gil Levy , Aviv Kfir
- Applicant: MELLANOX TECHNOLOGIES TLV LTD.
- Applicant Address: IL Ra'anana
- Assignee: MELLANOX TECHNOLOGIES TLV LTD.
- Current Assignee: MELLANOX TECHNOLOGIES TLV LTD.
- Current Assignee Address: IL Ra'anana
- Agency: Kligler & Associates
- Main IPC: H04L12/709
- IPC: H04L12/709 ; H04L12/753 ; H04L12/741 ; H04L12/775 ; H04L12/721

Abstract:
A stacked switch packet communication system is connected to a Multi-Chassis Link Aggregation Group (MLAG). Devices in the system include a designated device for receiving packets that are destined for the MLAG. A new MLAG device is enabled while continuing packet communication by identifying an address of a single port in the new MLAG device. In first updates of the devices the single port is established in the forwarding databases of the devices and the packets transmitted through the devices to the single port. Thereafter, in second updates the single port is replaced in the forwarding databases by another port of the new MLAG device. Upon completion of respective second updates, the packets are transmitted through the devices to the other port in the MLAG.
Public/Granted literature
- US20190007301A1 Multi-Chassis Link Aggregation Learning on Standard Ethernet Links Public/Granted day:2019-01-03
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