Invention Grant
- Patent Title: Cells having transistors and interconnects including nanowires or 2D material strips
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Application No.: US15217252Application Date: 2016-07-22
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Publication No.: US10256223B2Publication Date: 2019-04-09
- Inventor: Jamil Kawa , Victor Moroz
- Applicant: SYNOPSYS, INC.
- Applicant Address: US CA Mountain View
- Assignee: SYNOPSYS, INC.
- Current Assignee: SYNOPSYS, INC.
- Current Assignee Address: US CA Mountain View
- Agency: Haynes Beffel & Wolfeld LLP
- Agent Yiding Wu
- Main IPC: H01L27/02
- IPC: H01L27/02 ; G06F17/50 ; H01L27/11 ; H01L29/06 ; H01L29/78 ; B82Y10/00 ; H01L29/423 ; H01L29/66 ; H01L29/775 ; H01L27/092 ; H01L21/8238

Abstract:
An integrated circuit design tool includes a cell library. The cell library includes entries for a plurality of cells, entries in the cell library including specifications of particular cells in a computer executable language. At least one entry in the cell library can comprise a specification of physical structures and timing parameters of a plurality of transistors and an interconnect; wherein a transistor in the plurality has a channel comprising one or more nanowires or 2D material strips arranged in parallel, and the interconnect comprises one or more nanowires or 2D material strips arranged in parallel and connected to terminals of more than one of the transistors in the plurality of transistors. An integrated circuit including the plurality of transistors and the interconnect is described.
Public/Granted literature
- US20160329313A1 CELLS HAVING TRANSISTORS AND INTERCONNECTS INCLUDING NANOWIRES OR 2D MATERIAL STRIPS Public/Granted day:2016-11-10
Information query
IPC分类: