Invention Grant
- Patent Title: Forming switch circuit with controllable phase node ringing
-
Application No.: US16053607Application Date: 2018-08-02
-
Publication No.: US10256236B2Publication Date: 2019-04-09
- Inventor: Ji Pan , Sik Lui
- Applicant: Alpha and Omega Semiconductor Incorporated
- Applicant Address: US CA Sunnyvale
- Assignee: ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED
- Current Assignee: ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED
- Current Assignee Address: US CA Sunnyvale
- Agency: JDI Patent
- Agent Joshua D. Isenberg; Robert Pullman
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/306 ; H01L21/308 ; H01L21/8234 ; H01L27/02 ; H01L29/06 ; H01L29/10 ; H01L29/423 ; H01L29/66 ; H02M3/158

Abstract:
A switch circuit includes a first MOS transistor and a second MOS transistor of a same conductivity type connected in parallel between a first terminal and a second terminal of the switch circuit, the first and second MOS transistors having respective gate terminals coupled to the control terminal to receive a control signal to turn the first and second MOS transistors on or off. The first MOS transistor is characterized by a first reverse gate-to-drain capacitance (Crss) and the second MOS transistor is characterized by a second Crss that is greater than the first Crss.
Public/Granted literature
- US20180342506A1 FORMING SWITCH CIRCUIT WITH CONTROLLABLE PHASE NODE RINGING Public/Granted day:2018-11-29
Information query
IPC分类: