Invention Grant
- Patent Title: Semiconductor device structures for burn-in testing and methods thereof
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Application No.: US15685997Application Date: 2017-08-24
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Publication No.: US10261123B2Publication Date: 2019-04-16
- Inventor: Mark E. Tuttle
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: G01R31/28
- IPC: G01R31/28 ; H01L23/538 ; H01L23/498 ; H01L23/00 ; G01R31/02

Abstract:
A semiconductor device structure is provided. The semiconductor device structure includes a substrate, an electrical connection structure extending upwardly from an upper surface of the substrate by a first height, and a contact pad electrically disposed on the upper surface of the substrate. The contact pad has a solder-wettable surface with an area configured to support a solder ball having a second height at least twice the first height. The semiconductor device structure further includes a fuse element with a first end electrically coupled to the electrical connection structure and a second end electrically coupled to the contact pad.
Public/Granted literature
- US20190064257A1 SEMICONDUCTOR DEVICE STRUCTURES FOR BURN-IN TESTING AND METHODS THEREOF Public/Granted day:2019-02-28
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