-
公开(公告)号:US12051670B2
公开(公告)日:2024-07-30
申请号:US17490224
申请日:2021-09-30
Applicant: Micron Technology, Inc.
Inventor: Mark E. Tuttle , John F. Kaeding , Owen R. Fay , Eiichi Nakano , Shijian Luo
CPC classification number: H01L24/32 , H01L24/29 , H01L24/33 , H01L2224/29078 , H01L2224/32105 , H01L2224/3303 , H01L2224/33107 , H01L2224/3313 , H01L2924/381
Abstract: A semiconductor device assembly has a first substrate, a second substrate, and an anisotropic conductive film. The first substrate includes a first plurality of connectors. The second substrate includes a second plurality of connectors. The anisotropic conductive film is positioned between the first plurality of connectors and the second plurality of connectors. The anisotropic conductive film has an electrically insulative material and a plurality of interconnects laterally separated by the electrically insulative material. The plurality of interconnects forms electrically conductive channels extending from the first plurality of connectors to the second plurality of connectors. A method includes connecting the plurality of interconnects to the first plurality of connectors and the second plurality of connectors, such that the electrically conductive channels are operable to conduct electricity from the first substrate to the second substrate. The method may include passing electrical current through the plurality of interconnects.
-
2.
公开(公告)号:US20240170435A1
公开(公告)日:2024-05-23
申请号:US18419382
申请日:2024-01-22
Applicant: Micron Technology, Inc.
Inventor: Eiichi Nakano , Mark E. Tuttle
IPC: H01L23/00 , H01L25/065
CPC classification number: H01L24/29 , H01L24/27 , H01L24/83 , H01L25/0657 , H01L2224/279 , H01L2224/29076 , H01L2224/29147 , H01L2224/29155 , H01L2224/2919 , H01L2224/83851
Abstract: An anisotropic conductive film (ACF) is formed with an ordered array of discrete regions that include a conductive carbon-based material. The discrete regions, which may be formed at small pitch, are embedded in at least one adhesive dielectric material. The ACF may be used to mechanically and electrically interconnect conductive elements of initially-separate semiconductor dice in semiconductor device assemblies. Methods of forming the ACF include forming a precursor structure with the conductive carbon-based material and then joining the precursor structure to a separately-formed structure that includes adhesive dielectric material to be included in the ACF. Sacrificial materials of the precursor structure may be removed and additional adhesive dielectric material formed to embed the discrete regions with the conductive carbon-based material in the adhesive dielectric material of the ACF.
-
公开(公告)号:US11881468B2
公开(公告)日:2024-01-23
申请号:US17456066
申请日:2021-11-22
Applicant: Micron Technology, Inc.
Inventor: Eiichi Nakano , Mark E. Tuttle
IPC: H01L23/00 , H01L25/065
CPC classification number: H01L24/29 , H01L24/27 , H01L24/83 , H01L25/0657 , H01L2224/279 , H01L2224/2919 , H01L2224/29076 , H01L2224/29147 , H01L2224/29155 , H01L2224/83851
Abstract: An anisotropic conductive film (ACF) is formed with an ordered array of discrete regions that include a conductive carbon-based material. The discrete regions, which may be formed at small pitch, are embedded in at least one adhesive dielectric material. The ACF may be used to mechanically and electrically interconnect conductive elements of initially-separate semiconductor dice in semiconductor device assemblies. Methods of forming the ACF include forming a precursor structure with the conductive carbon-based material and then joining the precursor structure to a separately-formed structure that includes adhesive dielectric material to be included in the ACF. Sacrificial materials of the precursor structure may be removed and additional adhesive dielectric material formed to embed the discrete regions with the conductive carbon-based material in the adhesive dielectric material of the ACF.
-
4.
公开(公告)号:US11756844B2
公开(公告)日:2023-09-12
申请号:US17170120
申请日:2021-02-08
Applicant: Micron Technology, Inc.
Inventor: Wei Zhou , Bret K. Street , Mark E. Tuttle
IPC: H01L23/532 , H01L23/10 , H01L25/065 , H01L23/00 , H01L23/04 , H01L25/00
CPC classification number: H01L23/10 , H01L23/04 , H01L24/17 , H01L24/67 , H01L24/70 , H01L24/73 , H01L24/81 , H01L24/89 , H01L25/0657 , H01L25/50 , H01L24/16 , H01L2224/0401 , H01L2224/05647 , H01L2224/131 , H01L2224/13025 , H01L2224/16145 , H01L2224/16146 , H01L2224/16227 , H01L2224/17181 , H01L2224/17517 , H01L2224/8109 , H01L2224/81075 , H01L2224/8182 , H01L2224/81122 , H01L2224/81815 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2225/06575 , H01L2225/06593 , H01L2924/01029 , H01L2924/3025 , H01L2224/131 , H01L2924/014 , H01L2924/00014
Abstract: A semiconductor device includes a substrate; a die attached over the substrate; and a metal enclosure continuously encircling a space and extending vertically between the substrate and the die.
-
公开(公告)号:US11745281B2
公开(公告)日:2023-09-05
申请号:US17307253
申请日:2021-05-04
Applicant: Micron Technology, Inc.
Inventor: Mark E. Tuttle
IPC: B23K1/00 , B23K1/018 , H01L23/00 , H01L21/66 , B23K3/02 , B23K3/03 , B23K3/08 , B23K101/40 , B23K101/42
CPC classification number: B23K1/018 , B23K1/0016 , B23K3/029 , B23K3/03 , B23K3/08 , H01L22/32 , H01L24/799 , H01L24/98 , B23K2101/40 , B23K2101/42 , H01L24/13 , H01L2224/13101 , H01L2224/7999 , H01L2224/98 , H01L2224/13101 , H01L2924/014 , H01L2924/00014
Abstract: A solder removal apparatus is provided. The solder removal apparatus comprises a plurality of solder-interfacing protrusions extending from a body by a length. Each of the plurality of solder-interfacing protrusions is configured to remove a corresponding one of a plurality of solder features from a semiconductor device, where each of the plurality of solder features has a height and an amount of solder material.
-
公开(公告)号:US20230197669A1
公开(公告)日:2023-06-22
申请号:US17881572
申请日:2022-08-04
Applicant: Micron Technology, Inc.
Inventor: Wei Zhou , Bret K. Street , Benjamin L. McClain , Mark E. Tuttle
CPC classification number: H01L24/75 , H01L24/97 , H01L24/81 , H01L23/481 , H01L2224/81203 , H01L2224/95091 , H01L2224/75317
Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
-
公开(公告)号:US11410962B2
公开(公告)日:2022-08-09
申请号:US17099625
申请日:2020-11-16
Applicant: Micron Technology, Inc.
Inventor: Wei Zhou , Bret K. Street , Benjamin L. McClain , Mark E. Tuttle
Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
-
公开(公告)号:US20210252621A1
公开(公告)日:2021-08-19
申请号:US17307253
申请日:2021-05-04
Applicant: Micron Technology, Inc.
Inventor: Mark E. Tuttle
Abstract: A solder removal apparatus is provided. The solder removal apparatus comprises a plurality of solder-interfacing protrusions extending from a body by a length. Each of the plurality of solder-interfacing protrusions is configured to remove a corresponding one of a plurality of solder features from a semiconductor device, where each of the plurality of solder features has a height and an amount of solder material.
-
公开(公告)号:US20210091037A1
公开(公告)日:2021-03-25
申请号:US17099655
申请日:2020-11-16
Applicant: Micron Technology, Inc.
Inventor: Wei Zhou , Bret K. Street , Benjamin L. McClain , Mark E. Tuttle
Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
-
公开(公告)号:US20210074671A1
公开(公告)日:2021-03-11
申请号:US17099625
申请日:2020-11-16
Applicant: Micron Technology, Inc.
Inventor: Wei Zhou , Bret K. Street , Benjamin L. McClain , Mark E. Tuttle
Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
-
-
-
-
-
-
-
-
-